D&IC. 1

LASER TRIMMING MODELING OF THIN FILM INTEGRATED RESISTORS,
A. Manolescu, A.M. Manolescu, “Politehnica” Univ. of Bucharest, Romania.

D&IC. 2

MODIFIED SOI-MOSFET STRUCTURE WITH SHALLOWS DIFFUSIONS, C. Ravariu,
A. Rusu, F. Ravariu*, “Politehnica” Univ. of Bucharest, *IMT-Bucharest, Romania.

D&IC. 3

CALCULATION OF THE DEPLETION REGION WIDTH AND BARRIER CAPACITANCE OF DIFFUSED SEMICONDUCTOR JUNCTIONS WITH APPLICATION TO REACH-THROUGH BREAKDOWN VOLTAGE OF SEMICONDUCTOR DEVICES WITH DIFFUSED BASE, M.J. Cristea, “Politehnica” Univ. of Bucharest, Romania.

D&IC. 4

THE VOLTAGE DEPENDENCE OF REVERSE CURRENT OF SEMICONDUCTOR PN JUNCTIONS AND Its DISTRIBUTION OVER THE DEVICE AREA, V.V.N. Obreja,
IMT-Bucharest, Romania.

D&IC. 5
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ON THE TUNING POSSIBILITIES OF AN RF BANDPASS FILTER WITH SIMULATED INDUCTOR, C. Andriesei, L. Goras, Faculty of Electronics and Telecommunications, Iasi, Romania.

D&IC. 6
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ELECTRO-THERMAL SIMULATION ENVIRONMENT FOR DIGITAL ICs,
V. Moleavin, M.D. Profirescu*, Microchip Develpoment Romania, Bucharest, *”Politehnica” Univ. of Bucharest, Romania.

D&IC. 7
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A PROCEDURE BASED ON THE ANOVA METHOD FOR ESTIMATING THE MAXIMUM NUMBER OF GENERATIONS FOR OPTIMIZATION GENETIC ALGORITHMS,
I. Codreanu, IMT-Bucharest, Romania.

D&IC. 8

STACKS OR FILE-REGISTERS IN CELLULAR COMPUTING ?, m. Stoian, G. Stefan, „Politehnica” Univ. of Bucharest, Romania.

D&IC. 9

DESIGN ASPECTS FOR GATE DRIVER OF POWER SWITCH, C. Ionascu, Infineon Technologies Romania SCS, Bucharest, Romania.

D&IC. 10

VLSI IMPLEMENTATION OF HIGH-SPEED CELLULAR AUTOMATA ENCRYPTION ALGORITHM, P. Anghelescu, E. Sofron,
S. Ionita, Univ. of Pitesti, Romania.

D&IC. 11

PROTECTION FUNCTIONS IN INTEGRATED LOW SIDE SWITCHES, A. Danchiv, Infineon Technologies Romania, Bucharest, Romania.

D&IC. 12

CMOS Differential Structure with Improved Linearity and Increased Frequency Response, C. Popa,
A.M. Manolescu, „Politehnica” Univ. of Bucharest, Romania.

D&IC. 13

TWO BEAMS MODIFIED LEMNISCATE UNDULATOR, S. Miclos1, M.I. Rusu1,
D. Tenciu1, V. Savu1, L. Giurgiu2, F. Scarlat3, V.I.R. Niculescu3, 1National Inst. of R&D for Optoelectronics INOE-2000, 2Univ. of Bucharest, 3INFPLR, Bucharest, Romania.

D&IC. 14

SOFTWARE SIMULATION AND PERFORMANCE ANALYSIS FOR TURBO ENCODING/DECODING CHIP COMPONENTS FOR MAGNETIC RECORDING CHANNELS, P.M. Putinica, St. Stancescu, „Politehnica” Univ. of Bucharest, Romania.

D&IC. 15

APPLICATION OF A NEW BODY CONTACT TO SOI LDMOSFET DEVICES, THREE-DIMENSIONAL SIMULATION, A. Daghighi, M.A. Osman*, Islamic Azad Univ. Isfahan, Iran, *Washington State Univ., Pullman, WA, USA.

D&IC. 16

A SELF-CONSISTENT MODELING OF 4H-SiC SCHOTTKY BARRIER DIODES, M.B. Tayel, A.M. El-Shawarby, Alexandria Univ., Egypt.

D&IC. 17

LOW-POWER CARRY LOOK-AHEAD ADDER WITH MULTI-THRESHOLD VOLTAGE CMOS TECHNOLOGY, J.B. Kim, D.W. Kim*, Kangwon National Univ., *Samsung SDI Co., Ltd, Korea.