Project Title: High Performance, Safe, Secure, Open-Source Leveraged RISC-V Domain-Specific Ecosystems
Acronim: ISOLDE
Proiect type: European Partnerships and Missions
Contract no. 13/ 2024 (PN-IV-P8-8.1-PME-2024-0022)
Project duration: 01.04.2024 – 30.04.2026
Project Budget: 1.920.470 lei
Project area: 1 - Digitalization, Industry and Space (ASC); Digital Economy and Space Technologies (DSIN); Advanced Functional Materials (DSIN); Advanced Manufacturing (DSIN)
Coordinator: National Institute for Research and Development in Microtechnologies - IMT Bucharest (www.imt.ro)
Project financed by the Ministry of Research, Innovation and Digitization, CNCS/CCCDI - UEFISCDI, within PNCDI IV. - Program 5.8 - European and International Cooperation.
Project director: Dr. Cătălin CIOBANU ([email protected])

The activities of this project are part of the European project ISOLDE- High Performance, Safe, Secure, Open-Source Leveraged RISC-V Domain- Specific Ecosystems (Grant agreement ID: 101112274). Webpage: https://www.isolde-project.eu/
Partners: https://www.isolde-project.eu/partners
MT is involved in all WPs: WP1 - Requirements and Specifications; WP2 - Open-source Cores, WP3 Accelerators and Extensions; WP5 Case Studies and Demonstrators; WP6 Open-source Strategy, Business Models, Exploitation, Dissemination and Project Coordination.

The European Chips Act considers the further development and implementation of open source technologies and applications, both hardware and software, to be essential assets for strengthening design capacity and achieving digital autonomy at EU level. The ISOLDE project aims to respond to the challenge launched by the European CHIPS-JU Program by developing high-performance RISC-V processing systems and platforms demonstrated in key application areas such as automotive, space and IoT. IMT's main contributions to the ISOLDE project with the design and implementation of a SIMD/Vector accelerator for RISC-V processors, scratchpad memories and custom register banks. Also, IMT will develop algorithms optimized for Fourier transforms and optimized vector and parallel algorithms for fast Fourier transform (FFT) and convolution in signal processing.

 

 

 

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Conference papers (published in Proceedings, Oral Presentations or Posters)
1. Cătălin Bogdan Ciobanu, Honorius Gâlmeanu, Alexandru Puscasu, Mihai Gologanu, Octavian Buiu, Mihai Antonescu, Vlad-Gabriel Serbu, Vasile-Mădălin Moise, Cristian-Tiberius Axinte, Alexandru-Tudor Popovici, George-Iulian Uleru, Andrei Stan, Mihai Munteanu, Alexandru Drîmbărean, Csaba Nemeti, Dănut Rotar, Cosmin Moisa, Bogdan Ditu, Petre Cristian Trusca, Marius Antache, Simona Costinescu, Mari-Anais Sachian, George Suciu, Cristian Gheorghe, Cristina Tudor, Kejsi Koci, RISC-V Accelerators, Enablement and Applications for Automotive and Smart Home in the ISOLDE Project, in Proceedings of International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2024 conference, pages 1-16, Samos, Greece, July 2024

2. Alexandru Puscasu, Catalin Bogdan Ciobanu, Octavian Buiu, Systolic Array Matrix Multiplication Accelerator, in Proceedings of International Semiconductor Conference (CAS), pages 1-4, Sinaia, October 2024

3. Diana Vuta-Popescu, Ionut, Catalin Antofi, Catalin Bogdan Ciobanu, Csaba Zoltan Kertesz, SIMD Extensions – A Historical Perspective, in Proceedings of 2024 IEEE 30th International Symposium for Design and Technology in Electronic Packaging (SIITME), Sibiu, October 2024

4. Catalin Bogdan Ciobanu, Dan Manolescu, Roxana Vladuta, Luciana Chitu, Cosmin Moisa, Marcel Manofu, Paul Svasta, TIE Micro – Chiplets and Next-gen Packaging, in Proceedings of 2024 IEEE 30th International Symposium for Design and Technology in Electronic Packaging (SIITME), Sibiu, October 2024

5. Cătălin Bogdan Ciobanu, Holger Schmidt, Wolfgang Ecker, Rob Wullems, Patrick Pype, Tiberio Fanti, Dominik Baumann, Alexandru Pușcașu, Mihai Gologanu, Răzvan Stancu, Octavian Buiu, Sven Mehlhop, Jörg Walter, Gianvito Urgese, Michelangelo Barocci, Tommaso Terzano, Guido Masera, Maurizio Martina, George Suciu, Mari-Anais Sachian, Nicoleta Capbun, Alexandru Șneapotă, Călin Zamfir, Anca Burlacu-Zane, Simona Costinescu, Ambily Suresh, Diego Gigena-Ivanovich, Honorius Gâlmeanu, Mihai Munteanu, Alexandru Drîmbărean, Darshak Sheladiya, Jan Reinhard, Florian Krebs, David Engraf, Holger Blasum, Mattia Paladino, Daniele Gregori, Federico Proverbio, Jan Kastil, Pavel Zaykov, Alexander Schober, Rainer Buchty, Mladen Berekovic, Amrit Sharma Poudel, Lukas Groth, Saleh Mulhem, Emanuele Valpreda, Andrea Zunino, Luigi Feola, Samuel Matea, Cosmin Moisa, Andrei Stan, Alexandru-Tudor Popovici, George-Iulian Uleru, Cristian-Tiberius Axinte, Cosmin-Andrei Popovici, Daniel Gracia Pérez, Sylvain Girbal, Jérôme Quévremont, André Sintzoff, Angelo Garofalo, Alessandro Nadalini, Fatma Jebali, Caaliph Andriamisaina, Florian Egert, Maurizio Capra, Alessandro Aimar, Valerio Venceslai, Francesco De Maldé, Maria Elena D’Agostino, Gabriele Magnani, Davide Baroffio , Andrea Galimberti, Carlo Brandolese, Giancarlo Storti Gajani, Costin-Emanuel Vasile, Vlad-Gabriel Serbu, Alexandra-Mihaela Enescu, Radu Hobincu, Calin Bira, Elijah Seth Cishugi, Marco Ottavi. TRISTAN & ISOLDE Chips-JU RISC-V Projects, in Proceedings of International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2025 conference, pages 1-16, Samos, Greece, July 2025.

6. Răzvan Stancu, Mihai Gologanu, Alexandru Pușcasu, Cătălin Bogdan Ciobanu,Octavian Buiu, Scalable 16-N point FFT Accelerator, in Proceedings of 2025 IEEE 31st International Symposium for Design and Technology in Electronic Packaging (SIITME 2025), pages 1-5, Brașov, Romania, October 2025.

7. Andreea Violeta Pascociu, Andrei Eduard Solomon, Csaba Zoltán Kertész, Cătălin Bogdan Ciobanu. Minutiae Extraction Optimization for ARM and RISC-V, in Proceedings of 2025 IEEE 31st International Symposium for Design and Technology in Electronic Packaging (SIITME 2025), pages 1-8, Brașov, Romania, October 2025

8. Ștefan Cristian Jarcău, Ionuț Alexandru Oprea, Alexandru Mihai Andrei, Robert Ionuț Duca,Bogdan Valentin Floricescu, Cătălin Bogdan Ciobanu, Lucian Mircea Sasu, Sorin Mihai Grigorescu, Adversarial Attacks Detection for Self-Driving Cars using GPUs, in Proceedings of 2025 IEEE 31st International Symposium for Design and Technology in Electronic Packaging (SIITME 2025), pages 1-7, Brașov, Romania, October 2025.

 

POSTERS

1. Alexandru Pușcașu, Cătălin Bogdan Ciobanu, Octavian Buiu, RISC-V Simd/Vector Accelerator, International Conference on Embedded Computer Systems: Architectures,
Modeling and Simulation (SAMOS) 2024 conference, Samos, Greece, July 2024

ORAL PRESENTATIONS:

1. Cătălin Bogdan Ciobanu, Alexandru Pușcașu, Mihai Gologanu, Seminar Prezentarea contribuțiilor IMT București la proiectul ISOLDE și rolul IMT București în clusterul românesc din proiect, IMT București, Bucharest, Romania, 20.09.2024

2.Bogdan Costinescu, Cătălin Bogdan Ciobanu, Contribution of Romanian ISOLDE Cluster: RISC-V Accelerators, Enablement and Applications for Automotive and Smart Home, IEEE Day 2024, Bucharest, Romania, 01.10.2024
3. Cătălin Bogdan Ciobanu, Contribution of Romanian ISOLDE Cluster: RISC-V Accelerators, Enablement and Applications for Automotive and Smart Home, International Semiconductor Conference (CAS), Bucharest, Romania, 11.10.2024
4. Cătălin Bogdan Ciobanu, Alexandru Pușcașu, Octavian Buiu, Petre Cristian Trușcă, Marius Antache, Bogdan Dițu, Simona Costinescu, Sven Mehlhop, Frank Oppenheimer, Joerg Walter, Ares Tahiraga, Endri Kaja, Jad AlHalabi, Sebastian Prebeck, Wolfgang Ecker,  Andrei Stan, George-Emil Vieriu, Alexandru-Tudor Popovici, Cristian-Tiberius Axinte, George Suciu, Anais Sachian, Nicoleta Capbun, Saleh Muhem, Amrit Sharma Poudel, Mladen Berekovic
Using reconfigurable hardware in the ISOLDE RISC-V CHIPS-JU project​, Reconfigurable Architectures Workshop(RAW) inside the International Parallel & Distributed Processing Symposium (IPDPS), Milan, Italy 03.06.2025

Academic publications

1. Alexandru Pușcașu, „Extensie a setului de instrucțiuni RISC-V pentru operații pe matrici”, Teză de masterat, Universitatea Transilvania din Brașov, 2025.
Link: https://repository.unitbv.ro/handle/123456789/2919

2. Mariana-Luciana Mitu, „Accelerarea hardware a conversiei spațiilor de culoare YUV–RGB pe procesoarele RISC-V”, Lucrare de licență, Universitatea Transilvania din Brașov, 2025. Link: https://repository.unitbv.ro/handle/123456789/2917

3. Vlad-Mihai Popescu, „Extinderea compilatorului LLVM pentru arhitectura RISC-V”, Lucrare de licență, Universitatea Transilvania din Brașov, 2025
Link: https://repository.unitbv.ro/handle/123456789/2918

 

AWARDS

1. Best student paper award pentru lucrarea Alexandru Puscasu, Catalin Bogdan Ciobanu, Octavian Buiu, Systolic Array Matrix Multiplication Accelerator, in Proceedings of International Semiconductor Conference (CAS), pages 1-4, Sinaia, October 2024

2. Best paper award pentru lucrarea Catalin Bogdan Ciobanu, Dan Manolescu, Roxana Vladuta, Luciana Chitu, Cosmin Moisa, Marcel Manofu, Paul Svasta, TIE Micro – Chiplets and Next-gen Packaging, in Proceedings of 2024 IEEE 30th International Symposium for Design and Technology in Electronic Packaging (SIITME), Sibiu, October 2024.